July 1, 2025, 14:53
On July 1, 2025, at the Intel AI Summit Seoul 2025 held in Seoul, South Korea, Intel officially revealed key information about its AI chip “Jaguar Shores.” During the summit, representatives from SK Hynix disclosed that their collaboration on high-bandwidth and large-capacity memory is accelerating, signaling a new wave of technological innovation for future AI applications.
“Jaguar Shores” Combined with HBM4
According to SK Hynix’s presentation, “Jaguar Shores” will support the latest HBM4 (High Bandwidth Memory 4) technology, which will significantly enhance data processing speeds and bandwidth capabilities. HBM technology, known for its excellent transfer rates and low latency, is becoming a preferred choice for high-performance computing and AI training.
It is understood that HBM4 will provide bandwidth of up to 6400 MT/s per chip, and its integrated design can substantially reduce power consumption, which is critical for improving the operational efficiency of large-scale data centers. Intel’s “Jaguar Shores” will be its second-generation product combining data center GPUs with AI ASICs, marking a major leap forward for Intel in the AI hardware domain.
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